Explicit Control Instruction
Hi,I'd like to know whether there is a set of control instructions for programmers to set Xeon Phi in different energy/power states (C0, C1, C3, C6)? Thanks!
View ArticleReg: CPU + XeonPhi implementation of algorithm
Hi,I am trying to implement a load balancing algorithm using CPU + XeonPHi. The code snippet looks below#define NUM_ITER 100 #define WORK_SIZE 10 . . for (int i =0; i < NUM_ITER; i++) { #pragma omp...
View Articlehybrid application on the Xeon Phi
I would like to run a hybrid application (CP2K) on the Xeon Phi. The application is MPI + OpenMP and I set up the environment in the following manner: $ export OMP_NUM_THREADS=15 $ export...
View ArticlePlease help me with this code segment. It runs slower a lot when offloading...
Code:#pragma offload target(mic) in(icf_1:length(row * column) alloc_if(1) free_if(0)) nocopy(buff:length(row) alloc_if(1) free_if(0)) nocopy(icfa_1:length(icfa_dim * (icfa_dim + 1) / 2) alloc_if(1)...
View Articleopenmp vs. MIC speed issue
Hello,I am having issues with speed for a particular loop of my code. The openmp version with 8 threads is beating it every time on stampede. The way my example code below is organized is into three...
View Articlepacked store operation for vectorization on MIC
Hey everyone, I have a loop structure that looks like the following.do all atoms i numneigh(i) = 0 do all potential neighbors k do j = potential_neighbor(k) delx = x(j)-x(i); dely = y(j)-y(i); delz =...
View Articlemounting GPFS on Xeon Phi
Hello, what is the best way to mount GPFS on an Intel Xeon Phi card? Do I have to export GPFS as NFS and then mount NFS on the Phi?Thanks in advance,
View ArticleWhy does the Xeon Phi speed up more than 16 times when using Vector...
Hello,The question comes from following code:float fa[128] __attribute__((align(64))); float fb[128] __attribute__((align(64))); for(j=0; j<100000000; j++) { for(k=0; k<128; k++) {...
View ArticleAuthentication problems (NIS/YP and HostBased)
I have tried to set up NIS/YP authentication as described in the MPSS 3.3 manual as after we upgraded it was found that user's SSH keys and accounts weren't being copied over any longer. Presumably...
View ArticleCannot get sample code to run
I am trying to get the mic offload samples available at https://software.intel.com/en-us/articles/offload-programming-fortran-an...to run. Everything appears to build without error; here is the output...
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HDR Rendering with God Rays Using OpenCL™ Technology
Download Code SampleDownload DocumentationFeatures / DescriptionThis sample demonstrates a CPU-optimized implementation of the God Rays effect, showing how to:Implement calculation kernels using the...
View ArticleGeneral Matrix Multiply Sample
Download for WindowsDownload for LinuxDownload DocumentationDescriptionGeneral Matrix Multiply (GEMM) sample demonstrates how to efficiently utilize an OpenCL™ device to perform general matrix multiply...
View Articlegcc 4.7.0 for k1om codegen bug
Not sure where to report this for it to be heard, but I encountered a code generation bug (register assignment) when using gcc 4.7.0.The errant C++ code:// This code exposes a bug on gcc 4.7.0 for k1om...
View ArticleBug in mpss-3.2.4 kernel module on RHEL 6.5
On every odd reboot I get this:Sep 11 20:38:16 cassini kernel: mic 0000:02:00.0: PCI INT A -> GSI 32 (level, low) -> IRQ 32 Sep 11 20:38:16 cassini kernel: mic 0000:02:00.0: PCI INT A -> GSI...
View ArticleProblems with shell in MPSS 3.3
Hello,I have a problem with the recent MPSS 3.3 version. For some reason, the busybox does not seem to be used and bash is not really working. So let me explain what I experienced.On a fresh booted...
View ArticleOptimizing a Maximum Search on the Xeon Phi
Hello, I am currently trying to optimize an argmax search. That means i want to know the index of the biggest element in an array. But i need to multiply two arrays to get the desired array where to...
View Articleperformance difference in different MPSS versions
Hi,I ran a very simple benchmark code on two Xeon Phi cards with different MPSS versions and got different performance results in terms of FLOPS. Briefly, program running on mpss-3.1.2 got 1984 GFLOP/s...
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Intel® Xeon Phi™ Coprocessor code named “Knights Landing” - Application...
As part of the application readiness efforts for future Intel® Xeon® processors and Intel® Xeon Phi™ coprocessors (code named Knights Landing), developers are interested in improving two key aspects of...
View Articlerun mic_samples/LEO_tutorial :symbol lookup error
[root@node0 LEO_tutorial]# make mic icc -openmp -c tbo_sort.c -o tbo_sort.o icc -V tbo_sort.o -openmp -o tbo_sort.out Intel(R) C Intel(R) 64 Compiler XE for applications running on Intel(R) 64,...
View ArticlePython and FFMPEG on PHI??
I am new to parallel computing and wondered if running my Python app that calls FFMPEG to crunch edit videos would be a good fit for the 61 processors on PHI?My developer friend made the app to be able...
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