Building R for Phi
Hi,Has anyone successfully built R to run natively on Phi?Thanks,George
View ArticlePhi seems not fully support AVX512? Any way to do MATRIX transpose?
I found in past topics that mm512_unpacklo_* is not supported on phi. In my own implementation, it seems mm512_permute* and mm512_shuffle* is also not supported. So far all matrix transpose operation...
View ArticleIntel(R) Manycore Platform Software Stack (MPSS) - Long-Term-Support Archive
In this page you will find the last releases of the Intel(R) Manycore Platform Software Stack (MPSS) Long Term Support product (LTS). The most recent release is found here:...
View Article31S1P problems (MSI-X Enable-, or 4G Decoding, probably)
Hello, everyone. I've been lurking on the forums for a few days now while I schemed up a cooling solution for my shiny new 31S1P. I'm pretty sure I've conquered the cooling requirements....
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How to allocation MICs to all the MPI processors equally for AO?
Hello, Could you please take a look at this problem? My machine has 16 CPUs and 4 MICs (47 coprocessors each), and I run my program with 8 MPI processors (mpi_comm_size = 8) and want to use MKL...
View ArticleXeon Phi and offload from MATLAB MEX file
Hello,I am having a really hard time figuring out how to use the Xeon Phi offload mode from within MATLAB MEX files under Linux. I have managed to force MATLAB to use icc for compilation and verified...
View ArticleRegarding sgemm benchmarks for MIC devices
Hi Intel forums,I've had difficulty reproducing the performance reported on the following page:https://www-ssl.intel.com/content/www/us/en/benchmarks/server/xeon-phi/xeon-phi-sgemm-dgemm.htmlUsing the...
View ArticleCurrent status of OFED support
Hello,Could you please provide us with some matrix: what OFED should be used for what OS distribution in case of the latest MPSS (3.5.2, linux)? We need to know in what cases MPSS supports the OFED and...
View ArticleHow Xeon Phi divides address space with distributed L2
Hello,I have been working with Knights Corner platform for some time. Like they do with libnuma and DPDK, I have been wondering if I could write a cache and memory controller-aware memory allocation...
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Intel® Parallel Studio XE 2016: High Performance for HPC Applications and Big...
Intel® Parallel Studio XE 2016, launched on August 25, 2015, is the latest installment in our developer toolkit for high performance computing (HPC) and technical computing applications. This suite of...
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No Cost Options for Intel Parallel Studio XE, Support yourself, Royalty-Free
Intel® Parallel Studio XE is a very popular product from Intel that includes the Intel Compilers, Intel Performance Libraries, tools for analysis, debugging and tuning, tools for MPI and the Intel MPI...
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Debugging Intel® Xeon Phi™ Applications on Linux* Host
ContentsIntroductionDebug Solution for Intel® MICHow to get it?Why use GNU* GDB provided by Intel?Why is Intel providing a Command Line and Eclipse* IDE Integration?FeaturesRegister and Instruction Set...
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Debugging Intel® Xeon Phi™ Applications on Windows* Host
ContentsIntroductionDebug Solution for Intel® MICHow to get it?Debug Solution as IntegrationComponents RequiredConfigure & TestPrerequisite for DebuggingDebugging Applications with Offload...
View Articleiconv issue
hi all, I'm trying to build something for the Phi that depends on iconv; the library routines are present , but the following application fails when run on the Phi:#include <stdlib.h> #include...
View ArticleQuestions about SCIF Driver
I have a system with 2 PHI cards installed running on redhat 7.0. I am able to run code on the cards as pure offload and I can ssh into the cards. I am trying to get symmetric mode to work.1) Does...
View ArticleKnight's Landing + Java
Dear Intel Staff,I just got to know some details of your great presentation of Knight's Landing (KNL) at Hot Chips this year. Information about KNL on the website is still sparse. From your slides I...
View ArticleSimple Offload Example Failing
Hello,I'm attempting to run a simple offload example: #include <stdio.h> #include <omp.h> int main(){ double sum; int i,n, nt; n=2000000000; sum=0.0e0; #pragma offload target(mic:0) {...
View ArticleWhy MIC requires strict data alignment? How about auto vectorize of unaligned...
MIC requires strict 64Byte data alignment to utilize vpu, but why? I found Sparc also have such an requirement. But other multi-core CPU can handle unaligned data.As MIC can automatically vectorize a...
View Articleoffload_transfer: array of variables?
Hello,I would like to pre-allocate a number of buffers for later data transfers from CPU to MIC, using explicit offloading in C++.It works nicely if each buffer corresponds to an explicit variable...
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No Cost Options for Intel Math Kernel Library (MKL), Support yourself,...
The Intel® Math Kernel Library (Intel® MKL), the high performance math library for x86 and x86-64, is available for free for everyone (click here now to register and download). Purchasing is only...
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