HBM for the Intel® Xeon Phi™ Coprocessor
PurposeThis article provides instructions for code access, build, and run directions for the Baffin-Bay test cases for the HBM code, running on Intel® Xeon® processors and Intel® Xeon Phi™...
View Articleattributes offload
for fortran there is an option of setting the functions/subroutines in an offload region as follows:!dir$ offload attributes: mic:: func_or_sub_nameI have two questions about this option:1) does it...
View ArticleGetting the Most out of your Intel® Compiler with the New Optimization Reports
The performance improvement an application gets from being compiled with optimization can be enhanced by understanding and acting on optimization reports. Fortunately, this has become much easier with...
View ArticleCreating a direct ethernet path to Xeon Phi
Hi, We have a requirement to be able to pass traffic from an ethernet network directly on a Xeon Phi card installed on our host, bypassing the CPU and main memory of the host for performance reasons....
View ArticleThe delay of frequency/voltage scaling
Dear all, I'm reading the MPSS3.3 source codes.In \drivers\micpm\mic_cpufreq.c, there are some definitions as following:#define K1OM_FREQ_DELAY 10 /* delay this many usecs, for each loop of the freq...
View ArticleWrong order of MPSS service in RHEL7: no NFS from host on boot
By default, in MPSS 3.4 and RHEL 7, the service mpss.service in multi-user.target starts before nfs.target. As a consequence, any NFS mounts from the host in mic0:/etc/fstab are not mounted after...
View ArticleMPSS 3.4 "micctrl --initdefaults" deletes /etc/mpss/micN.conf - SL6.5
I have a server with Scientific Linux 6.5 installed that has (2) Xeon Phi cards installed. I am trying to perform the initial setup for the MPSS 3.4 and installation required building from source to...
View Articleoffload_report
i am using offload_report at level 2, there we have mic time and cpu time. i have two questions about it:1) why they are different?2) which one should we use?thanks!
View ArticleSegmentation fault caused by unalignment
I'm trying to write some assemble programs on mic manually, but I'm really stuck by the forced alignment.For example, assume there's a double array whose elements start from the address addr, and it's...
View Articleinout
if i do as follows in fortran...integer,allocatable::a(:)...allocate(a(n))...!dir$ offload target(mic) inout(a)!$omp parallel do...inside the do loop a is being passed to subroutines and assigned...
View ArticleAbout GDDR5 memory channels on Coprocessors and user processes getting killed
Hi all,Actually, I am asking this more out of cruosity than need.I am using native mode on Xeon Phi coprocessor card (60 cores). What happens when cores issue too many memory writes? Normally (to my...
View Articleicc15 produces 20% slower code than icc14
Hi all,I tried out the new Intel compiler (15.0.0 20140723) with a big intrinsics kernel on the MIC. The programs runs 20% slower than compared to icpc 14.0.3 20140422. I analyzed and attached the...
View ArticleMount a filesystem on a PCIe SSD over PCI direct?
Dear all,I am wondering if it is possible to directly mount a filesystem on a PCIe SSD over PCIe directly?If not, what are the alternatives? Is NFS via the host processor the only other solution?Best...
View ArticleProfermace Problem of Phi
Hi Charles Congdon,I am using Phi Coprocessor to doing a project. When I ran this function in CPU, 24 cores, the time is about 8.5 msec. But It ran about 700 msec pn Phi. In order to figure it our, I...
View ArticleNFS as RootDevice
Hi, Since we tried to use nfs export dir as RootDevice of Xeon Phi card. According to https://software.intel.com/sites/default/files/article/373934/system-adm..., we made changes as below.It seems...
View ArticleIntel® Xeon Phi™ Coprocessor code named “Knights Landing” - Application...
As part of the application readiness efforts for future Intel® Xeon® processors and Intel® Xeon Phi™ coprocessors (code named Knights Landing), developers are interested in improving two key aspects of...
View ArticleSecurity Advisory: Intel(R) MPSS affected by Shellshock bug
Recently there was a critical vulnerability exposed in the GNU* Bourne-Again Shell (Bash), the common command-line shell used in many Linux*/UNIX operating system. This vulnerability also affects...
View ArticleSpecial Promotion for Developers: Intel® Xeon Phi™ Coprocessor 31S1P
Special Promotion for Developers: Intel® Xeon Phi™ Coprocessor 31S1PIntel is offering a limited time, limited volume special promotion for the Intel® Xeon Phi™ Coprocessor 31S1P. This offer is designed...
View ArticleRequest for Xeon Phi kit
Dear All,I am interested in trying out the new release of LAMMPS for Intel Xeon Phi. I was wondering if there is a program through which I could obtain an evaluation version of the Xeon Phi, or if...
View Article280 slides on Xeon Phi programming
The slides for Colfax's 1-day training on Xeon Phi programming and optimization are now publicly available at http://research.colfaxinternational.com/post/2014/10/13/CDT-Slides.aspxThey contain much...
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